The increasing application of integrated circuits in situations where high reliability is needed places a requirement on the manufacturer to use methods of testing to eliminate devices that may fail on service. One possible approach that is described in this book is to make precise electrical measurements that may reveal those devices more likely to fail. The measurements assessed are of analog circuit parameters which, based on a knowledge of failure mechanisms, may indicate a future failure. . To incorporate these tests into the functional listing of very large scale integrated circuits consideration has to be given to the sensitivity of the tests where small numbers of devices may be defective in a complex circuit. In addition the tests ideally should require minimal extra test time. A range of tests has been evaluated and compared with simulation used to assess the sensitivity of the measurements. Other work in the field is fully referenced at the end of each chapter. The team at Lancaster responsible for this book wish to thank the Alvey directorate and SERe for the necessary support and encouragement to publish our results. We would also like to thank John Henderson, recently retired from the British Telecom Research Laboratories, for his cheerful and enthusiastic encouragement. Trevor Ingham, now in New Zealand, is thanked for his early work on the project.

1 Introduction to VLSI Testing.- 1.1 The Problem.- 1.2 Reliability Testing.- 1.3 The CMOS Process.- 1.4 Failure Modes and Mechanisms in CMOS.- 1.5 Outline of the Project.- 1.5.1 Requirements for the Tests.- 1.5.2 Possible Measurements.- 1.5.3 Generation of Defective Samples.- 1.5.4 Stresses Used.- 1.5.5 Device Simulations.- 1.6 Choice of Devices.- 1.7 Outline of the Book.- References.- 2 The Devices Studied and Their Simulation.- 2.1 Introduction.- 2.2 Details of the Devices Studied.- 2.3 SPICE Circuit Files and Device Parameters.- 2.4 Simulation Procedures.- 2.5 Results.- 2.5.1 4013 Results.- 2.5.2 4014 Results.- 2.5.3 Semi-Custom Multiplier Results.- 2.6 Conclusions.- Reference.- 3 The Tests and Stress Experiments.- 3.1 Introduction to the Test Procedures.- 3.1.1 Approach to the Test Methods.- 3.1.2 Rationale of Test Verification.- 3.2 Accelerated Stress Methods.- 3.3 Details of the Tests Used.- 3.3.1 The Static Current Test.- 3.3.1.1 Introduction to the StCT.- 3.3.1.2 Test Pattern Generation for the StCT.- 3.3.1.3 Features of the StCT.- 3.3.2 The Cut-off Frequency Test.- 3.3.2.1 Introduction to the CoFT.- 3.3.2.2 Test Pattern Generation for the CoFT.- 3.3.2.3 Features of the CoFT.- 3.3.3 The Transient Current Test.- 3.3.3.1 Introduction to the TrCT.- 3.3.3.2 Test Pattern Generation for the TrCT.- 3.3.3.3 Features of the TrCT.- 3.3.4 The Static Current Noise Test.- 3.3.4.1 Introduction to the ScNT.- 3.3.4.2 Features of the ScNT.- 3.3.5 The Transient Current Noise Test.- 3.3.6 The Threshold Voltage Test.- 3.4 Organization of the Experiment.- References.- 4 Assessment of the Tests as Predictors of Failure.- 4.1 Behavior of the Devices Subject to Thermal and Electrical Stress.- 4.1.1 Reference to Experimental Details.- 4.1.2 Discussion of the StCT.- 4.1.3 Discussion of the CoFT.- 4.1.4 Discussion of the TrCT.- 4.1.5 Discussion of the StNT.- 4.1.6 Discussion of the TINT.- 4.1.7 Discussion of the ThVT.- 4.2 Behavior of Devices Subject to Ionizing Irradiation Stress.- 4.2.1 Discussion of the StCT.- 4.2.2 Discussion of the ThVT.- 4.2.3 Discussion of the TrCT.- 4.2.4 Discussion of the CoFT.- 4.3 Assessment of the Tests.- 4.3.1 Detection of Defects.- 4.3.2 Fault Location and Cause.- 4.3.3 Sensitivity of the Tests.- 4.3.4 Comparison of the Tests.- References.- 5 Implementation of the Tests for Industrial Use.- 5.1 Introduction.- 5.2 Test Strategies.- 5.3 Extension of Tests to VLSI.- 5.4 Implementation of the Test on a Digital Tester.- 5.4.1 The Semi-Custom Multiplier Chip.- 5.4.2 The Multiplier Test Set.- 5.5 Reliability Test Equipment and Techniques.- 5.6 Implementation of the Tests using Dedicated Analog Circuits.- 5.6.1 Introduction.- 5.6.2 Sampling Methods.- 5.6.3 Comparison Methods.- 5.6.4 Modulation Methods for Diagnosis.- 5.7 Application to Other Digital Families.- References.- 6 Conclusions.- 6.1 Validity of the Experiments.- 6.2 Recommended Tests.- 6.3 Use of the Tests.- 6.4 Further Work.- Appendix 1 SPICE Circuit Files Used in the Simulations.