An interdisciplinary guide to enabling technologies for 3D ICs and 5G mobility, covering packaging, design to product life and reliability assessments

• Features an interdisciplinary approach to the enabling technologies and hardware for 3D ICs and 5G mobility
• Presents statistical treatments and examples with tools that are easily accessible, such as Microsoft's Excel and Minitab
• Fundamental design topics such as electromagnetic design for logic and RF/passives centric circuits are explained in detail
• Provides chapter-wise review questions and powerpoint slides as teaching tools

Lih-Tyng Hwang, National Sun Yat-Sen University, Taiwan, obtained BS degree in Mechanical Engineering from National Tsing-Hua University, Hsinchu, Taiwan, earned PhD degree in Electrical and Systems Engineering from University of Pennsylvania, Philadelphia, Pennsylvania. He started his R&D career with MCNC (Microelectronics Center of North Carolina) in Research Triangle Park, North Carolina. In 1994, he continued his career with SPS (Semiconductor Products Sector), Motorola in Tempe, Arizona. He obtained an MBA degree from ASU while he was with SPS. In 2002, he transferred to Motorola Labs in Schaumburg, Illinois, where he actively worked with Motorola's Mobile division. He began his teaching career with National Sun Yat-Sen University, Kaohsiung, in August, 2009.

Jason Tzyy-Sheng Horng, National Sun Yat-Sen University, Taiwan, received the B.S.E.E. degree from National Taiwan University, Taipei, Taiwan, in 1985, and the M.S.E.E. and Ph.D. degrees from the University of California at Los Angeles (UCLA), in 1990 and 1992, respectively. Since August 1992, he has been with the Department of Electrical Engineering, National Sun Yat-Sen University (NSYSU), Kaohsiung, Taiwan, where he was the Director of the Telecommunication Research and Development Center (2003 - 2008) and Director of the Institute of Communications Engineering (2004 - 2007), and where he is currently a Professor. He has authored or coauthored over 100 technical publications published in refereed journals and conferences proceedings. He holds over ten patents. His research interests include RF and microwave integrated circuits and components, RF signal integrity for wireless system-in-package, and digitally assisted RF technologies.

Lih-Tyng Hwang, National Sun Yat-Sen University, Taiwan, obtained BS degree in Mechanical Engineering from National Tsing-Hua University, Hsinchu, Taiwan, earned PhD degree in Electrical and Systems Engineering from University of Pennsylvania, Philadelphia, Pennsylvania. He started his R&D career with MCNC (Microelectronics Center of North Carolina) in Research Triangle Park, North Carolina. In 1994, he continued his career with SPS (Semiconductor Products Sector), Motorola in Tempe, Arizona. He obtained an MBA degree from ASU while he was with SPS. In 2002, he transferred to Motorola Labs in Schaumburg, Illinois, where he actively worked with Motorola's Mobile division. He began his teaching career with National Sun Yat-Sen University, Kaohsiung, in August, 2009.

Jason Tzyy-Sheng Horng, National Sun Yat-Sen University, Taiwan, received the B.S.E.E. degree from National Taiwan University, Taipei, Taiwan, in 1985, and the M.S.E.E. and Ph.D. degrees from the University of California at Los Angeles (UCLA), in 1990 and 1992, respectively. Since August 1992, he has been with the Department of Electrical Engineering, National Sun Yat-Sen University (NSYSU), Kaohsiung, Taiwan, where he was the Director of the Telecommunication Research and Development Center (2003 2008) and Director of the Institute of Communications Engineering (2004 2007), and where he is currently a Professor. He has authored or coauthored over 100 technical publications published in refereed journals and conferences proceedings. He holds over ten patents. His research interests include RF and microwave integrated circuits and components, RF signal integrity for wireless system-in-package, and digitally assisted RF technologies.

3D IC and RF SiPs: Advanced Stacking and Planar Solutions for 5G Mobility

Lih-Tyng Hwang, National Sun Yat-Sen University, Taiwan, Jason Tzyy-Sheng Horng, National Sun Yat-Sen University, Taiwan

A concise summary of the state of the art, this book is an interdisciplinary guide to enabling technologies for 3D ICs and 5G mobility, covering packaging, design to product life and reliability assessments. Readers are introduced to the markets, technology drivers, integrated circuits, packaging and substrate trends that go hand-in-hand with the development of 3D IC and RF SiP, as well as related digital and RF designs, and product life and reliability assessments. Smart phone tear-down is used to illustrate the key components for mobility (4G and future 5G), such as AP/mobile memory and RFIC/RF FE. Other essential topics include packaging technology, high density logic design, RF system integration and future trends in MTM technology.

• Features an interdisciplinary approach to the enabling technologies and hardware for 3D ICs and 5G mobility
• Presents statistical treatments and examples with tools that are easily accessible, such as Microsoft's Excel and Minitab
• Fundamental design topics such as electromagnetic design for logic and RF/passives centric circuits are explained in detail
• Provides chapter-wise review questions and powerpoint slides as teaching tools

3D IC and RF SiPs offers graduate students and researchers an essential guide to advanced stacking and planar solutions for 5G mobility. It can also be used as a reference text for engineers and advanced students of semiconductors, communications hardware, and IC packaging technologies.

1 MM and MTM for Mobility 1

1.1 Convergence in Communications and the Future, 5G 3

1.1.1 From 1980 (1G) to 2010 (4G) 3

1.1.2 LTE?-A and Rel 10 in 2010s 6

1.1.3 The Future: 5G and IoT (Targeting 2020) 8

1.2 Review of Key Products in Communication Networks 14

1.2.1 Wired Communications 14

1.2.2 Wireless Communications 21

1.3 MM and MTM, an Intro to Hardware Technology 31

1.3.1 Moore's Law 31

1.3.2 More Than Moore 43

1.3.3 MTM Packaging Map and MM? MTM Business Model 53

2 Interconnects 67

2.1 Hierarchy of Interconnection 69

2.1.1 On? Chip (Level 0) Interconnections 69

2.1.2 Peripheral Pads on Semiconductor ICs (Level 0) 72

2.1.3 Al pads (Wirebond and Flip Chip) 73

2.1.4 Cu/Low? K Re?-Distribution Using Damascene Techniques (Flip Chip) 74

2.1.5 Au Pads (IIIV) 77

2.1.6 Level 1 Interconnections: WB and FCWhy FC Interconnections are Preferred? 78

2.2 Level 1, Interconnection Gap in FC?-PBGA, and Level 0.5 80

2.2.1 Wirebonds 80

2.2.2 Flip Chip Bumps with UBM 85

2.2.3 TSV and Microbumps, Cu or Au Stud Bumps (Level 0.5) 91

2.3 Changing Dynamics of Semiconductor Manufacturing 100

2.3.1 Bumping Itself is a Business 100

2.3.2 Cu/Low?-K in BEOL 102

2.3.3 Wafer Fab Foundry and OSAT are Competing for Their Business Shares 102

3 State? of ?the? Art IC Packages, Modules, and Substrates 111

3.1 Single?-Chip Packages (SCPs): Standardized Packages 113

3.1.1 Lead Frame Based: SO, QFP/QFN, and TAB 114

3.1.2 Organic Interposer Based: BGA/CSP and LGA 114

3.1.3 Known Good Bare Die 120

3.1.4 Single?-Chip Packaging Processes 121

3.1.5 IC Testing 123

3.2 Advanced IC Substrates and Assembly 124

3.2.1 MLO Substrates for ICs 126

3.2.2 Multi?-Layered Organic (MLO) for IC Packages 127