Zur Zeit liegt uns keine Inhaltsangabe vor.

Zur Zeit liegt uns keine Inhaltsangabe vor.

List of Figures. List of Tables. Preface. 1. Introduction. 2. Sources of Noise and Methods of Coupling. 3. Semiconductor Device Simulation. 4. Simplified Substrate Modeling and Rapid Simulation. 5. Mesh Generation. 6. Substrate Modeling in Heavily-Doped Bulk Process. 7. Substrate Resistance Extraction for Large Circuits. 8. Modeling Chip/Package Power Distribution. 9. Controlling Substrate Coupling in Heavily-Doped Bulk Processes. 10. Controlling Substrate Coupling in Bulk P-Wafers. 11. Chip/Package Shielding and Good Circuit Design Practice. 12. A Design Example. Appendices. A: Mesh Moments. B: Convergence Behaviour of Iterative Methods. Index.