Electrical Overstress (EOS) continues to impact semiconductor
manufacturing, semiconductor components and systems as technologies
scale from micro- to nano-electronics. This bookteaches the
fundamentals of electrical overstress and how to minimize and
mitigate EOS failures. The text provides a clear picture of EOS
phenomena, EOS origins, EOS sources, EOS physics, EOS failure
mechanisms, and EOS on-chip and system design. It provides an
illuminating insight into the sources of EOS in manufacturing,
integration of on-chip, and system level EOS protection networks,
followed by examples in specific technologies, circuits, and chips.
The book is unique in covering the EOS manufacturing issues from
on-chip design and electronic design automation to factory-level
EOS program management in today's modern world.

Look inside for extensive coverage on:

* Fundamentals of electrical overstress, from EOS physics,
EOS time scales, safe operating area (SOA), to physical
models for EOS phenomena

* EOS sources in today's semiconductor manufacturing
environment, and EOS program management, handling and EOS auditing
processing to avoid EOS failures

* EOS failures in both semiconductor devices, circuits and
system

* Discussion of how to distinguish between EOS events, and
electrostatic discharge (ESD) events (e.g. such as human body model
(HBM), charged device model (CDM), cable discharge events (CDM),
charged board events (CBE), to system level IEC 61000-4-2 test
events)

* EOS protection on-chip design practices and how they
differ from ESD protection networks and solutions

* Discussion of EOS system level concerns in printed circuit
boards (PCB), and manufacturing equipment

* Examples of EOS issues in state-of-the-art digital, analog and
power technologies including CMOS, LDMOS, and BCD

* EOS design rule checking (DRC), LVS, and ERC electronic design
automation (EDA) and how it is distinct from ESD EDA systems

* EOS testing and qualification techniques, and

* Practical off-chip ESD protection and system level solutions to
provide more robust systems

Electrical Overstress (EOS): Devices, Circuits and
Systems is a continuation of the author's series of books
on ESD protection. It is an essential reference and a useful
insight into the issues that confront modern technology as we enter
the nano-electronic era.

Steven H . Voldman , IEEE Fellow, Vermont, USA

Electrical Overstress (EOS) continues to impact semiconductor manufacturing, semiconductor components and systems as technologies scale from micro- to nano-electronics. This bookteaches the fundamentals of electrical overstress and how to minimize and mitigate EOS failures. The text provides a clear picture of EOS phenomena, EOS origins, EOS sources, EOS physics, EOS failure mechanisms, and EOS on-chip and system design. It provides an illuminating insight into the sources of EOS in manufacturing, integration of on-chip, and system level EOS protection networks, followed by examples in specific technologies, circuits, and chips. The book is unique in covering the EOS manufacturing issues from on-chip design and electronic design automation to factory-level EOS program management in today's modern world.

Look inside for extensive coverage on:

• Fundamentals of electrical overstress, from EOS physics, EOS time scales, safe operating area (SOA), to physical models for EOS phenomena
• EOS sources in today's semiconductor manufacturing environment, and EOS program management, handling and EOS auditing processing to avoid EOS failures
• EOS failures in both semiconductor devices, circuits and system
• Discussion of how to distinguish between EOS events, and electrostatic discharge (ESD) events (e.g. such as human body model (HBM), charged device model (CDM), cable discharge events (CDM), charged board events (CBE), to system level IEC 61000-4-2 test events)
• EOS protection on-chip design practices and how they differ from ESD protection networks and solutions
• Discussion of EOS system level concerns in printed circuit boards (PCB), and manufacturing equipment
• Examples of EOS issues in state-of-the-art digital, analog and power technologies including CMOS, LDMOS, and BCD
• EOS design rule checking (DRC), LVS, and ERC electronic design automation (EDA) and how it is distinct from ESD EDA systems
• EOS testing and qualification techniques, and
• Practical off-chip ESD protection and system level solutions to provide more robust systems

Electrical Overstress (EOS): Devices, Circuits and Systems is a continuation of the author's series of books on ESD protection. It is an essential reference and a useful insight into the issues that confront modern technology as we enter the nano-electronic era.

About the Author xvii

Preface xix

Acknowledgements xxiii

1 Fundamentals of Electrical Overstress 1

1.1 Electrical Overstress 2

1.1.1 The Cost of Electrical Overstress 2

1.1.2 Product Field Returns - The Percentage that is Electrical Overstress 2

1.1.3 Product Field Returns - No Defect Found versus Electrical Overstress 4

1.1.4 Product Failures - Failures in Integrated Circuits 4

1.1.5 Classification of Electrical Overstress Events 4

1.1.6 Electrical Over-Current 6

1.1.7 Electrical Over-Voltage 6

1.1.8 Electrical Over-Power 7

1.2 De-Mystifying Electrical Overstress 7

1.2.1 Electrical Overstress Events 8

1.3 Sources of Electrical Overstress 8

1.3.1 Sources of Electrical Overstress in Manufacturing Environment 8

1.3.2 Sources of Electrical Overstress in Production Environments 10

1.4 Misconceptions of Electrical Overstress 10

1.5 Minimization of Electrical Overstress Sources 11

1.6 Mitigation of Electrical Overstress 11

1.7 Signs of Electrical Overstress Damage 12

1.7.1 Signs of Electrical Overstress Damage - The Electrical Signature 12

1.7.2 Signs of Electrical Overstress Damage - The Visual Signature 13

1.8 Electrical Overstress and Electrostatic Discharge 14

1.8.1 Comparison of High and Low Current EOS versus ESD Events 15

1.8.2 Electrical Overstress and Electrostatic Discharge Differences 15

1.8.3 Electrical Overstress and Electrostatic Discharge Similarities 17

1.8.4 Comparison of EOS versus ESDWaveforms 18

1.8.5 Comparison of EOS versus ESD Event Failure Damage 19

1.9 Electromagnetic Interference 20

1.9.1 Electrical Overstress Induced Electromagnetic Interference 20

1.10 Electromagnetic Compatibility 21

1.11 Thermal Over-Stress 21

1.11.1 Electrical Overstress and Thermal Overstress 22

1.11.2 Temperature Dependent Electrical Overstress 22

1.11.3 Electrical Overstress and Melting Temperature 23

1.12 Reliability Technology Scaling 23

1.12.1 Reliability Technology Scaling and the Reliability Bathtub Curve 23

1.12.2 The Shrinking Reliability Design Box 24

1.12.3 The Shrinking Electrostatic Discharge Design Box 25

1.12.4 Application Voltage, Trigger Voltage, and Absolute Maximum Voltage 25

1.13 Safe Operating Area 26

1.13.1 Electrical Safe Operating Area 26

1.13.2 Thermal Safe Operating Area 27

1.13.3 Transient Safe Operating Area 28

1.14 Summary and Closing Comments 28

References 29

2 Fundamentals of EOS Models 36

2.1 Thermal Time Constants 36

2.1.1 The Thermal Diffusion Time 37

2.1.2 The Adiabatic Regime Time Constant 38

2.1.3 The Thermal Diffusion Regime Time Constant 38