The latest frequency synthesis techniques, including sigma-delta,
Diophantine, and all-digital
Sigma-delta is a frequency synthesis technique that has risen in
popularity over the past decade due to its intensely digital nature
and its ability to promote miniaturization. A continuation of the
popular Frequency Synthesis by Phase Lock, Second Edition, this
timely resource provides a broad introduction to sigma-delta by
pairing practical simulation results with cutting-edge research.
Advanced Frequency Synthesis by Phase Lock discusses both
sigma-delta and fractional-n--the still-in-use forerunner to
sigma-delta--employing Simulink® models and detailed
simulations of results to promote a deeper understanding.
After a brief introduction, the book shows how spurs are
produced at the synthesizer output by the basic process and
different methods for overcoming them. It investigates how various
defects in sigma-delta synthesis contribute to spurs or noise in
the synthesized signal. Synthesizer configurations are analyzed,
and it is revealed how to trade off the various noise sources by
choosing loop parameters. Other sigma-delta synthesis architectures
are then reviewed.
The Simulink simulation models that provided data for the
preceding discussions are described, providing guidance in making
use of such models for further exploration. Next, another method
for achieving wide loop bandwidth simultaneously with fine
resolution--the Diophantine Frequency Synthesizer--is
introduced. Operation at extreme bandwidths is also covered,
further describing the analysis of synthesizers that push their
bandwidths close to the sampling-frequency limit. Lastly, the book
reviews a newly important technology that is poised to become
widely used in high-production consumer
electronics--all-digital frequency synthesis.
Detailed appendices provide in-depth discussion on various
stages of development, and many related resources are available for
download, including Simulink models, MATLAB® scripts,
spreadsheets, and executable programs. All these features make this
authoritative reference ideal for electrical engineers who want to
achieve an understanding of sigma-delta frequency synthesis and an
awareness of the latest developments in the field.
Autorentext
WILLIAM F. EGAN, PHD, is a lecturer in electrical engineering at Santa Clara University, California. Formerly, he was a principal engineer at TRW ESL and a senior technologist at GTE Government Systems.
Zusammenfassung
The latest frequency synthesis techniques, including sigma-delta, Diophantine, and all-digital
Sigma-delta is a frequency synthesis technique that has risen in popularity over the past decade due to its intensely digital nature and its ability to promote miniaturization. A continuation of the popular Frequency Synthesis by Phase Lock, Second Edition, this timely resource provides a broad introduction to sigma-delta by pairing practical simulation results with cutting-edge research. Advanced Frequency Synthesis by Phase Lock discusses both sigma-delta and fractional-nthe still-in-use forerunner to sigma-deltaemploying Simulink® models and detailed simulations of results to promote a deeper understanding.
After a brief introduction, the book shows how spurs are produced at the synthesizer output by the basic process and different methods for overcoming them. It investigates how various defects in sigma-delta synthesis contribute to spurs or noise in the synthesized signal. Synthesizer configurations are analyzed, and it is revealed how to trade off the various noise sources by choosing loop parameters. Other sigma-delta synthesis architectures are then reviewed.
The Simulink simulation models that provided data for the preceding discussions are described, providing guidance in making use of such models for further exploration. Next, another method for achieving wide loop bandwidth simultaneously with fine resolutionthe Diophantine Frequency Synthesizeris introduced. Operation at extreme bandwidths is also covered, further describing the analysis of synthesizers that push their bandwidths close to the sampling-frequency limit. Lastly, the book reviews a newly important technology that is poised to become widely used in high-production consumer electronicsall-digital frequency synthesis.
Detailed appendices provide in-depth discussion on various stages of development, and many related resources are available for download, including Simulink models, MATLAB® scripts, spreadsheets, and executable programs. All these features make this authoritative reference ideal for electrical engineers who want to achieve an understanding of sigma-delta frequency synthesis and an awareness of the latest developments in the field.
Inhalt
Preface xv
Symbols List and Glossary xix
1 Introduction 1
1.1 Phase-Locked Synthesizer 2
1.2 Fractional-N Frequency Synthesis 3
1.3 Representing a Change in Divide Number 3
1.4 Units 5
1.5 Representing Phase Noise 5
1.6 Phase Noise at the Synthesizer Output 7
1.7 Observing the Output Spectrum 7
2 Fractional-N and Basic Synthesizers 9
2.1 First-Order Fractional-N 9
2.1.1 Canceling Quantization Noise 11
2.1.2 Cancellation with a PFD 13
2.1.3 Cancellation Techniques 15
2.1.4 Spectrum without Cancellation 16
2.1.5 Influence of N 17
2.2 Second-Order Fractional-N 17
2.2.1 Purpose 17
2.2.2 Form 18
2.2.3 Performance 19
2.2.4 Interpreting the Spectrum 21
2.3 Higher Order Fractional-N 24
2.3.1 Constant Sampling Rate 25
2.3.2 Noise Shaping Versus Cancellation 28
2.3.3 Effect of a Varying Sampling Rate 28
2.4 Spectrums with Constant Sampling Rate 31
2.4.1 100.625 MHz with Zero Initial Condition 31
2.4.2 100.62515... with Zero Initial Condition 34
2.4.3 100.625 MHz with Seed 36
2.5 Summary of Spectrums 36
2.6 Summary 36
3 Other Spurious Reduction Techniques 39
3.1 LSB Dither 39
3.2 Maximum Sequence Length 43
3.3 Shortened Accumulators and Lower Primes 48
3.4 Long Sequence 51
3.5 Summary 53
4 Defects in Synthesizers 55
4.1 Noise Models 55
4.1.1 VCO Noise 55
4.1.2 Basic-Reference Noise 56
4.1.3 Equivalent Input Noise 56
4.1.4 Quantization Noise 57
4.1.5 Parameter Dependence 57
4.1.6 Synthesizer Output Noise 57
4.1.6.1 Nominal Parameters 59
4.1.6.2 Higher Fout 60
4.1.6.3 Higher Fref 62
4.1.6.4 Summary 63
4.2 Levels of Other Noise in Synthesizers 64
4.2.1 Dither 65
4.2.2 Varying Sample Rate 65
4.2.3 Mismatched (Unbalanced) Charge Pumps 66
4.2.4 Levels for All Four Loop Configurations 67
4.2.5 Simple Charge Pump 69
4.2.6 System Performance 71
4.3 Noise Sources, Equivalent Input Noise 71
4.3.1 Without Modulation 72
4.3.2 Increase with Modulation 73
4.4 Discrete Sidebands 74
4.4.1 At Offsets Related to ffract 74
4.4.1.1 Due to Current Mismatch 74
4.4.1.2 Not Necessarily Related to Mismatch 75
4.4.2 At Offsets of nFref 75
4.4.2.1 Due to SD Modulation 76
4.4.2.2 Due to Delays in the PFD 77
4.4.2.3 Due to Leakage Current 77
4.4.2.4 Due to All Three 77
4.4.2.5 With Resampling 78
4.4.2.6 Significance of Levels 78
4.4.3 Charge Pump Dead Zone 80
4.5 Summary 80
5 Other Architectures 81
5.1 Stability 81
5.2 Feedback 82
5.3 Feed…